Senior Design Engineer – Mixed-Signal (PMIC)

Location: Suwanee, GA 30024 | Reporting To: Sr. Director, Engineering

Industry: Semiconductor, integrated circuits, memory | Employees: 700

Also open to mixed signal design engineers!

Responsibilities:

Contributing to digital and analog circuit design tasks with a focus on PMIC and PPA
Working in a growing laboratory with cutting-edge tools, in an R&D focused environment
Simulation, debugging, synthesis, timing analysis, and running various RTL tools to identify and fix potential issues
Designing/writing microarchitecture and RTL coding using System Verilog
Implementing fine-grain power gating for critical paths in the module to reduce leakage
Planning and coordinating verification + validation engineering to ensure full validation coverage
Floor-planning and supporting integration of digital circuits at top chip level
Collaborating with methodology and CAD groups, interfacing between different teams
Validating module design for syntax errors via Lint and clock/reset mismatch via CDC + RDC tools

Requirements:

8+ years of professional experience in mixed signal design
Experience with low power design using advanced deep micron process
Experience with Verilog RTL coding, including synchronous and asynchronous machines
Experience with Cadence schematic capture
Experience working with Linux-based systems
Experience with proportional-integral-derivative (PID) controllers is preferred
Experience with Virtuoso, Innovus, SimVision, Verilog, C++, and Python

Benefits:

100% covered medical, dental, vision for the employee (90% coverage for families)
401K with company match (5%)
Discounted RSUs
FSA, HSA options
Life insurance, long-term and short-term disability, and more

Compensation:

$150K - $200K + 15% Annual Bonus
Relocation assistance in form of a sign-on bonus
Also open to staff, principal, or senior principal level candidates & compensation

Temporary work, Relocation package,